In recent years, semiconductors have been reduced in size and increased in the number of layers as well as the complexity of logics. Thus, semiconductors have become quite difficult to manufacture. Consequently, defects originating from a manufacturing process are likely to occur frequently, and it has thus become important to correctly inspect such defects. A review SEM (Scanning Electron Microscope) for reviewing defects on a sample and a CD-SEM (Critical Dimension-SEM) for measuring the dimensions of a pattern are used to perform detailed inspection of such defects. Such SEM inspection devices are adapted to inspect circuit patterns corresponding to inspection coordinates that are based on an optical simulation or inspection coordinates that are based on an inspection result of an optical inspection apparatus.
Comparison between the shapes of a circuit pattern and a reference pattern is conducted in accordance with the following procedures. First, an inspection operator defines a circuit pattern with a preferable shape as a reference pattern. For the reference pattern, a designed pattern, a simulation pattern generated through an optical simulation, a golden pattern selected by an inspection operator from among manufactured circuit patterns, or the like is used. Next, the shape of a circuit pattern is extracted from a captured image using an edge detection process or the like. Then, the reference pattern and the circuit pattern are overlaid one on top of the other. Such overlaying is performed through manual adjustment or through automatic adjustment using pattern matching.
Various inspection methods have been proposed, but for a process of manufacturing a semiconductor with a thickness of 65 nm or less, it has become more common to apply a method of quantifying the amount of shape deformation of a circuit pattern with respect to a reference pattern by comparing the shape of the circuit pattern with the shape of the reference pattern with a view to correctly grasp the condition of a patterned shape with the presence of the optical proximity effect.
The shape of a circuit pattern would deform variously in response to changes in the manufacturing conditions of a semiconductor. Patent Literature 1 discloses, with a view to correctly grasp the degree of such deformation, using a circuit pattern, which is obtained by deforming a design pattern so as to conform to a wafer pattern, as a reference pattern, and measuring the gaps between edges of a circuit pattern to be inspected and those of the reference pattern, and then detecting a portion of the pattern whose edge distance is over a tolerable distance as a defect of the circuit pattern.
Patent Literature 2 discloses using a design pattern as a reference pattern, setting a measurement region in a two-dimensional region including inspection coordinates, and thoroughly measuring the distances between edges of the reference pattern and corresponding edges of a circuit pattern in the measurement region at predetermined intervals, and then averaging the plurality of measured values obtained from the measurement region so as to measure the shape deformation with respect to the reference pattern.
Patent Literature 3 discloses a measurement method that includes, using the average shape of a plurality of circuit patterns formed on a wafer as a reference pattern, thoroughly measuring the distances between edges of the reference pattern and corresponding edges of a circuit pattern at predetermined intervals, and determining the statistical value of the distances obtained from the measurement region as the amount of shape deformation.